1/9 november 2004 stP1806 n-channel 60v - 0.015 - 50a to-220 stripfet? power mosfet rev.0.1 typical r ds (on) = 0.015 exceptional dv/dt capability 100% avalanche tested description this power mosfet is the latest development of stmicroelectronis unique "single feature size?" strip-based process. the resulting transistor shows extremely high packing density for low on- resistance, rugged avalanche characteristics and less critical alignment steps therefore a remarkable manufact uring repr oducibility. applications high current, high switching speed motor control dc-dc & dc-ac converters automotive ordering information type v dss r ds(on) i d stP1806 60 v < 0.018 50 a sales type marking package packaging stP1806 P1806 to-220 tube 1 2 3 to-220 absolute maximum ratings ( pulse width limited by safe operating area. (1) i sd 50a, di/dt 400a/s, v dd v (br)dss , t j t jmax (2) starting t j = 25 o c, i d = 25a, v dd = 30v symbol parameter value unit v ds drain-source voltage (v gs = 0) 60 v v dgr drain-gate voltage (r gs = 20 k ) 60 v v gs gate- source voltage 20 v i d drain current (continuous) at t c = 25c 50 a i d drain current (continuous) at t c = 100c 35 a i dm ( ) drain current (pulsed) 200 a p tot total dissipation at t c = 25c 110 w derating factor 0.73 w/c dv/dt (1) peak diode recovery voltage slope 7 v/ns e as (2) single pulse avalanche energy 350 mj t stg storage temperature -55 to 175 c t j max. operating junction temperature internal schematic diagram
stP1806 2/9 thermal data electrical characteristics (t case = 25 c unless otherwise specified) off on (* ) dynamic rthj-case rthj-amb t l thermal resistance junction-case thermal resistance junction-ambient maximum lead temperature for soldering purpose max max 1.36 62.5 300 c/w c/w c symbol parameter test conditions min. typ. max. unit v (br)dss drain-source breakdown voltage i d = 250 a, v gs = 0 60 v i dss zero gate voltage drain current (v gs = 0) v ds = max rating v ds = max rating t c = 125c 1 10 a a i gss gate-body leakage current (v ds = 0) v gs = 20 v 100 na symbol parameter test conditions min. typ. max. unit v gs(th) gate threshold voltage v ds = v gs i d = 250 a 234v r ds(on) static drain-source on resistance v gs = 10 v i d = 27.5 a 0.015 0.018 symbol parameter test conditions min. typ. max. unit g fs (*) forward transconductance v ds = 15 v i d = 27.5 a 18 s c iss c oss c rss input capacitance output capacitance reverse transfer capacitance v ds = 25v, f = 1 mhz, v gs = 0 1530 300 105 pf pf pf
3/9 stP1806 switching on switching off source drain diode (*) pulse width [ 300 s, duty cycle 1.5 %. ( pulse width limited by safe operating area symbol parameter test conditions min. typ. max. unit t d(on) t r turn-on delay time rise time v dd = 30 v i d = 27.5 a r g =4.7 v gs = 10 v (resistive load, figure 3) 16 8 ns ns q g q gs q gd total gate charge gate-source charge gate-drain charge v dd = 48 v i d = 55 a v gs = 10v 44.5 10.5 17.5 60 nc nc nc symbol parameter test conditions min. typ. max. unit t d(off) t f turn-off delay time fall time v dd = 30v i d = 27.5 a r g =4.7 v gs = 10 v (resistive load, figure 3) 36 15 ns ns symbol parameter test conditions min. typ. max. unit i sd i sdm ( ) source-drain current source-drain current (pulsed) 50 200 a a v sd (*) forward on voltage i sd = 55a v gs = 0 1.5 v t rr q rr i rrm reverse recovery time reverse recovery charge reverse recovery current i sd = 55 a di/dt = 100a/s v dd = 30 v t j = 150c (see test circuit, figure 5) 75 170 4.5 ns nc a electrical characteristics (continued) safe operating area thermal impedance
stP1806 4/9 output characteristics transfer characteristics transconductance static drain-source on resistance gate charge vs gate-source voltage capacitance variations
5/9 stP1806 normalized gate threshold voltage vs temperature normalized on resistance vs temperature source-drain diode forward characteristics normalized breakdown voltage vs temperature.
stP1806 6/9 fig. 1: unclamped inductive load test circuit fig. 1: unclamped inductive load test circuit fig. 2: unclamped inductive waveform fig. 3: switching times test circuits for resistive load fig. 4: gate charge test circuit fig. 5: test circuit for inductive load switching and diode recovery times
7/9 stP1806
stP1806 8/9 revision history date revision description of changes tuesday 16 november 2004 0.2 updating marking
9/9 stP1806 i nformation furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the con sequence s o f use of such information nor for any infringement of patents or other rights of third parties which may result from its use. n o license is grante d b y implication or otherwise under any patent or patent rights of stmicroelectronics. specifications mentioned in this publicatio n are subje ct t o change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics produ cts are n ot a uthorized for use as critical components in life support devices or systems without express written approval of stmicroelectron ics. the st logo is registered trademark of stmicroelectronics all other names are the property of their respective owners. 2004 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco -singapore - spain - sweden - switzerland - united kingdom - united states. www.st.com
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